144 lines
3.7 KiB
C
144 lines
3.7 KiB
C
#pragma once
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#define IDT_CALL 0x0C
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#define IDT_INTERRUPT 0x0E
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#define IDT_TRAP 0x0F
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#define IDT_DPL0 0x00
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#define IDT_DPL3 0x60
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#define IDT_PRESENT 0x80
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#define NUM_INTERRUPTS 256
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#define INT_DE 0x00 // Divide by zero exception
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#define INT_DB 0x01 // Debug exception
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#define INT_NMI 0x02 // Non-maskable Interrupt exception
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#define INT_BP 0x03 // Beakpoint exception
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#define INT_OF 0x04 // Overflow exception
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#define INT_BR 0x05 // Bound Range exception
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#define INT_UD 0x06 // Invalid Opcode exception
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#define INT_NM 0x07 // Device not Available exception
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#define INT_DF 0x08 // Double Fault exception
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#define INT_CSO 0x09 // Coprocessor Segment Overrun exception
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#define INT_TS 0x0A // Invalid TSS exception
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#define INT_NP 0x0B // Segment not Present excepton
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#define INT_SS 0x0C // Stack exception
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#define INT_GP 0x0D // General Protection Fault exception
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#define INT_PF 0x0E // Page Fault exception
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// Unused exception 0x0F
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#define INT_MF 0x10 // Floating Point exception pending
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#define INT_AC 0x11 // Alignment Check exception
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#define INT_MC 0x12 // Machine Check exception
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#define INT_XF 0x13 // SIMD Floating Point exception
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// Unused exception 0x14 - 0x1D
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#define INT_SX 0x1E // Security exception
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// Unused exception 0x1F
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// User interrupts 0x20 and forward
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#define INT_IRQ0 0x20
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#define INT_IRQ1 0x21
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#define INT_IRQ2 0x22
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#define INT_IRQ3 0x23
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#define INT_IRQ4 0x24
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#define INT_IRQ5 0x25
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#define INT_IRQ6 0x26
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#define INT_IRQ7 0x27
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#define INT_IRQ8 0x28
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#define INT_IRQ9 0x29
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#define INT_IRQ10 0x2A
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#define INT_IRQ11 0x2B
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#define INT_IRQ12 0x2C
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#define INT_IRQ13 0x2D
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#define INT_IRQ14 0x2E
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#define INT_IRQ15 0x2F
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#define INT_IRQ16 0x30
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#define INT_IRQ17 0x31
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#define INT_IRQ18 0x32
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#define INT_IRQ19 0x33
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#define INT_IRQ20 0x34
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#define INT_IRQ21 0x35
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#define INT_IRQ22 0x36
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#define INT_IRQ23 0x37
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#define INT_APIC_TIMER 0x40
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#define INT_APIC_THERMAL 0x41
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#define INT_APIC_PERF 0x42
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#define INT_APIC_LINT0 0x43
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#define INT_APIC_LINT1 0x44
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#define INT_APIC_ERROR 0x45
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#define INT_APIC_SPUR 0xFF
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#define INT_SYSCALL 0x80
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#define RFLAGS_IOPL (3<<12)
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#define RFLAGS_IOPL1 (1<<12)
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#define RFLAGS_IOPL2 (2<<12)
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#define RFLAGS_IOPL3 (3<<12)
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#define RFLAGS_INT (1<<9)
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#define REG_OFFSET_RFLAGS 152
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#ifndef __ASSEMBLER__
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#include <stdint.h>
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#include <apic.h>
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struct int_gate_descriptor
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{
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uint16_t base_l;
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uint16_t cs;
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uint8_t ist;
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uint8_t flags;
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uint16_t base_m;
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uint32_t base_h;
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uint32_t ignored;
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} __attribute__ ((packed));
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struct idtr
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{
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uint16_t len;
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uint64_t addr;
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} __attribute__ ((packed));
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void pic_init();
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extern unsigned int irq_map[24];
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#define IRQ_INT(irq) (INT_IRQ0 + IRQ(irq))
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#define IRQ(irq) (irq_map[irq])
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#define IRQ_MASK(irq) ioapic_mask(IRQ(irq))
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#define IRQ_UNMASK(irq) ioapic_unmask(IRQ(irq))
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#define IRQ_ACK(irq) apic_ack(IRQ(irq))
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#define IRQ_TIMER 0
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#define IRQ_KEYBOARD 1
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typedef struct registers_st
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{
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uint64_t rax;
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uint64_t rbx;
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uint64_t rcx;
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uint64_t rdx;
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uint64_t rsi;
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uint64_t rdi;
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uint64_t rbp;
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uint64_t r8;
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uint64_t r9;
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uint64_t r10;
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uint64_t r11;
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uint64_t r12;
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uint64_t r13;
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uint64_t r14;
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uint64_t r15;
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uint64_t int_no; //120
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uint64_t err_code; //128
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uint64_t rip; //136
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uint64_t cs; //144
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uint64_t rflags; //152
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uint64_t rsp; //160
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uint64_t ss; //168
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}registers_t;
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typedef registers_t *(*int_handler_t)(registers_t *);
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void interrupt_init();
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int_handler_t register_int_handler(uint32_t num, int_handler_t h);
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void isr_return(registers_t *r);
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#endif
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