From bebf8c622bc4ad7279624c6283f11ef3e61b75af Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Thomas=20Lov=C3=A9n?= <thomasloven@gmail.com>
Date: Sat, 15 Jan 2022 22:04:28 +0100
Subject: [PATCH] Handle model specific registers

---
 src/kernel/boot/kmain.c    |  4 ++++
 src/kernel/cpu/registers.S | 17 +++++++++++++++++
 src/kernel/include/cpu.h   |  4 +++-
 3 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/src/kernel/boot/kmain.c b/src/kernel/boot/kmain.c
index 40a5f7e..9311b1b 100644
--- a/src/kernel/boot/kmain.c
+++ b/src/kernel/boot/kmain.c
@@ -33,6 +33,10 @@ void kmain(uint64_t multiboot_magic, void *multiboot_data)
 
     TEMP_test_scheduler();
 
+    debug("Read MSR APIC_BASE: %lx\n", read_msr(0x0000001B));
+    debug("Read MSR SYSCALL_TARGET: %lx\n", read_msr(0xC0000082));
+    write_msr(0xC0000082, 0x1234567890abcdef);
+    debug("Read MSR SYSCALL_TARGET: %lx\n", read_msr(0xC0000082));
 
     start_scheduler();
 
diff --git a/src/kernel/cpu/registers.S b/src/kernel/cpu/registers.S
index 651fffb..f744c8b 100644
--- a/src/kernel/cpu/registers.S
+++ b/src/kernel/cpu/registers.S
@@ -8,4 +8,21 @@ load_idt:
 .global write_cr3
 write_cr3:
     mov cr3, rdi
+    ret
+
+.global read_msr
+read_msr:
+    mov rcx, rdi
+    rdmsr
+    shl rdx, 32
+    or rax, rdx
+    ret
+
+.global write_msr
+write_msr:
+    mov rcx, rdi
+    mov rax, rsi
+    mov rdx, rax
+    shr rdx, 32
+    wrmsr
     ret
\ No newline at end of file
diff --git a/src/kernel/include/cpu.h b/src/kernel/include/cpu.h
index 3c38f83..2b28c96 100644
--- a/src/kernel/include/cpu.h
+++ b/src/kernel/include/cpu.h
@@ -5,4 +5,6 @@ void cpu_init();
 
 // cpu/registers.S
 void load_idt(void *);
-void write_cr3(uint64_t);
\ No newline at end of file
+void write_cr3(uint64_t);
+uint64_t read_msr(uint32_t);
+uint64_t write_msr(uint32_t msr, uint64_t value);
\ No newline at end of file