Cleanup apic. Keyboard handler test
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@ -7,10 +7,22 @@
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#include <proc.h>
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#include <musl-glue.h>
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#include <cpu/interrupts.h>
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#include <ports.h>
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void TEMP_test_scheduler();
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struct kernel_boot_data_st kernel_boot_data;
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registers *kbd_handler(registers *r)
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{
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while(inb(0x64) & 0x2);
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uint8_t scancode = inb(0x60);
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debug("Keyboard: %x\n", scancode);
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irq_ack();
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return r;
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}
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void kmain(uint64_t multiboot_magic, void *multiboot_data) {
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musl_init();
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debug_info("Started kernel\n");
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@ -34,6 +46,8 @@ void kmain(uint64_t multiboot_magic, void *multiboot_data) {
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debug_info("Boot complete\n");
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bind_interrupt(IRQ_INTERRUPT(IRQ_PS2_KBD), kbd_handler);
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irq_unmask(IRQ_PS2_KBD);
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TEMP_test_scheduler();
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@ -7,8 +7,12 @@
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#define APIC_MSR_ENABLE (1<<11)
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#define APIC_EOI 0xB0
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#define APIC_SPURIOUS 0xF0
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#define APIC_REG(r) (((uint32_t *)P2V(APIC_BASE + (r)))[0])
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#define IOREDTBL(irq) (0x10 + (irq)*2)
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union iored {
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struct {
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uint8_t vector;
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@ -39,15 +43,32 @@ static void ioapic_write(int reg, uint32_t value) {
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static uint64_t ioapic_read_redirection(int irq) {
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union iored retval;
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retval.l = ioapic_read(0x10 + 2*irq);
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retval.h = ioapic_read(0x11 + 2*irq);
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retval.l = ioapic_read(IOREDTBL(irq));
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retval.h = ioapic_read(IOREDTBL(irq)+1);
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return retval.val;
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}
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static void ioapic_write_redirection(int irq, uint64_t val) {
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union iored value;
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value.val = val;
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ioapic_write(0x10 + 2*irq, value.l);
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ioapic_write(0x11 + 2*irq, value.h);
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ioapic_write(IOREDTBL(irq), value.l);
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ioapic_write(IOREDTBL(irq) + 1, value.h);
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}
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void irq_ack() {
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APIC_REG(APIC_EOI) = 0;
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}
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void irq_mask(int irq) {
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union iored iored;
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iored.val = ioapic_read_redirection(irq_redirects[irq]);
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iored.mask |= 0x1;
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ioapic_write_redirection(irq_redirects[irq], iored.val);
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}
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void irq_unmask(int irq) {
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union iored iored;
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iored.val = ioapic_read_redirection(irq_redirects[irq]);
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iored.mask &= ~0x1;
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ioapic_write_redirection(irq_redirects[irq], iored.val);
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}
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void ioapic_init() {
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@ -63,12 +84,6 @@ void ioapic_init() {
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iored.target = 0x0;
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ioapic_write_redirection(i, iored.val);
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}
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// TEMPORARY
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// Unmask PS/2 keyboard interrupt
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iored.val = ioapic_read_redirection(irq_redirects[1]);
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iored.mask &= ~0x1;
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ioapic_write_redirection(irq_redirects[1], iored.val);
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}
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void apic_init() {
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@ -76,5 +91,5 @@ void apic_init() {
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vmm_set_page(kernel_P4, (uintptr_t)P2V(APIC_BASE), APIC_BASE, PAGE_PRESENT | PAGE_WRITE | PAGE_GLOBAL);
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// Allow LAPIC to receive interrupts
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APIC_REG(0xF0) = APIC_REG(0xF0) | 0x100 | 0xFF;
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APIC_REG(APIC_SPURIOUS) = APIC_REG(APIC_SPURIOUS) | 0x100 | IRQ_SPURIOUS;
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}
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@ -5,7 +5,12 @@
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#define MAX_CPUS 16
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#define MAX_IRQS 24
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#define IRQ_BASE 0x20
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#define IRQ_INTERRUPT(irq) (IRQ_BASE + (irq))
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#define IRQ_PS2_KBD 0x1
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#define IRQ_SPURIOUS 0xFF
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struct cpu {
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uint8_t id;
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@ -36,5 +41,8 @@ uint64_t write_msr(uint32_t msr, uint64_t value);
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void acpi_parse(void *_rsdp);
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// cpu/apic.c
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void apic_init();
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void irq_ack();
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void irq_mask(int irq);
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void irq_unmask(int irq);
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void ioapic_init();
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void apic_init();
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