2022-01-17 14:38:40 +01:00

39 lines
1.0 KiB
C

#include <cpu.h>
#include <cpu/interrupts.h>
#include <ports.h>
#include <multiboot.h>
struct cpu *cpus[16];
struct ioapic ioapic = {0,0,0};
uint8_t irq_redirects[MAX_IRQS] = \
{0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23};
#define PIC1_ADDR 0x20
#define PIC2_ADDR 0xA0
#define PIC_INITIALIZE 0x10
#define PIC_SINGLE 0x02
static void pic_disable() {
// Absolute minimum work to initialize and disable legacy PIC.
// Both the primary and secondary PIC will think they are alone
// in a MCS-80 arch computer but that doesn't matter since all
// interrupts will be masked anyway :)
// Ref: Intel 8259A Datasheet
outb(PIC1_ADDR, PIC_INITIALIZE | PIC_SINGLE);
outb(PIC2_ADDR, PIC_INITIALIZE | PIC_SINGLE);
outb(PIC1_ADDR | 1, 0);
outb(PIC2_ADDR | 1, 0);
// Mask all interrupts
outb(PIC1_ADDR | 1, 0xFF);
outb(PIC2_ADDR | 1, 0xFF);
}
void early_cpu_init() {
interrupt_init();
}
void cpu_init() {
acpi_parse(kernel_boot_data.rsdp);
pic_disable();
apic_init();
ioapic_init();
}