Fix some badly formated bullet point lists

This commit is contained in:
Thomas Lovén 2016-12-14 08:03:52 +01:00
parent 2a5df36007
commit ae8250db6b
4 changed files with 10 additions and 0 deletions

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@ -71,6 +71,7 @@ despite the problems they cause with segmentation and TSS and stuff.
###Changing the privilege level
Changing the CPL is actually two different problems.
- Increasing CPL
- Decreasing CPL
@ -89,15 +90,18 @@ or through the `IRET` instruction
Let's change the topic for a minute and think about interrupts.
Say the processor is running in __Kernel Mode__ (Ring 0, CPL=0) and an
interrupt happens. What the processor does then is:
- Push SS and ESP to stack
- Push EFLAGS to stack
- Push CS and EIP to stack
- Load CS and EIP from the IDT
and from there the interrupt handling routine takes over.
The interrupt handling routine does its thing and then runs the `IRET`
instruction. `IRET` makes the processor do the same thing as when an interrupt
happens, but _backwards_. I.e:
- Pop CS and EIP from stack
- Pop EFLAGS from stack
- Pop SS and ESP from stack

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@ -11,11 +11,14 @@ arguments and return addresses. In other words, the stack comes in use
every time there is a function call.
The common way a function call is handled by a c compiler is this:
- Push each argument to the stack (in reverse order)
- Execute the `CALL` instruction (which pushes the address of the next
instruction to the stack and jumps to the callee)
The callee does the following:
- Push the base pointer to the stack
- Sets the base pointer to the current stack pointer
- Subtracts the stack pointer to reserve place for local variables.
@ -23,6 +26,7 @@ The callee does the following:
- Increase the stack pointer to free the space used by local variables.
- Pop the base pointer from stack.
- Execute the `RET` instruction (which puts the return value in EAX and
jumps to the position at the top of the stack.
While the callee is doing its thing it now has access to all the pushed

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@ -36,6 +36,7 @@ appreciate some of those features.
What I appreciate even more - at least this far - is the following
hardware features of the Z80 compared to the 8080.
- A single 5V power supply - as opposed to +5V, -5V and +12V for the 8080
- A single clock signal input - as opposed to two for the 8080

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@ -150,6 +150,7 @@ Let's take a closer look at the signals used.
![Z80 tester running 3](/media/img/z80_running3.png)
Here I also connected to the oscilloscope
- `/M1`
- `/MREQ`
- `/RD`