Handle model specific registers

src/kernel/boot/kmain.c

@@ -33,6 +33,10 @@ void kmain(uint64_t multiboot_magic, void *multiboot_data)
 
     TEMP_test_scheduler();
 
+    debug("Read MSR APIC_BASE: %lx\n", read_msr(0x0000001B));
+    debug("Read MSR SYSCALL_TARGET: %lx\n", read_msr(0xC0000082));
+    write_msr(0xC0000082, 0x1234567890abcdef);
+    debug("Read MSR SYSCALL_TARGET: %lx\n", read_msr(0xC0000082));
 
     start_scheduler();
 

src/kernel/cpu/registers.S

@@ -9,3 +9,20 @@ load_idt:
 write_cr3:
     mov cr3, rdi
     ret
+
+.global read_msr
+read_msr:
+    mov rcx, rdi
+    rdmsr
+    shl rdx, 32
+    or rax, rdx
+    ret
+
+.global write_msr
+write_msr:
+    mov rcx, rdi
+    mov rax, rsi
+    mov rdx, rax
+    shr rdx, 32
+    wrmsr
+    ret

src/kernel/include/cpu.h

@@ -6,3 +6,5 @@ void cpu_init();
 // cpu/registers.S
 void load_idt(void *);
 void write_cr3(uint64_t);
+uint64_t read_msr(uint32_t);
+uint64_t write_msr(uint32_t msr, uint64_t value);